1. Field of the Invention
The present invention relates to a four-transistor CMOS image sensor and, more preferably, to a high-quality sub-90 nm CMOS image sensor and a photo diode.
2. Discussion of Related Art
In high-quality CMOS image sensors (CIS) for data communication terminal devices, CMOS image sensors with three-million-plus pixels are not very sensitive to signals at low exposure. For this reason, the three-million-plus pixel CMOS image sensors are not put to practical use, but are instead replaced by CCD image sensors. However, since the CCD image sensor requires a high voltage of 10V or higher, a nanoscale CMOS circuit cannot be easily applied to the CCD image sensor, so it is difficult to make the CCD image sensor highly integrated. Furthermore, fabrication of the CCD image sensor is incompatible with that of typical CMOS devices. Thus, an image sensor module is bulky because it needs at least three chips, not just one. Additionally, the CCD image sensor consumes at least ten times the power that the CMOS image sensor does, owing to the high voltage, making it unsuitable for portable data terminals.
On the other hand, a CMOS image sensor includes a photo diode and a transistor in each image pixel, as in a typical CMOS device, and thus a conventional CMOS semiconductor fabrication process can be applied to fabrication of the CMOS image sensor without making any changes. Therefore, in contrast to the CCD image sensor requiring an additional chip with an image signal processor, the CMOS image sensor can cumulatively integrate an image signal processing circuit and an image detection circuit in a block outside a pixel, operate at a low voltage, and be fabricated at low cost.
A typical CMOS image sensor may be categorized as either a four-transistor pixel structure or a three-transistor pixel structure depending on the number of transistors of one pixel. The three-transistor pixel structure is superior to the four-transistor pixel structure in terms of fill factor and fabrication cost. However, the four-transistor pixel structure is normally used because a light receiving unit is separated from a detection unit and formed of silicon bulk except its surface, so that the four-transistor pixel structure is highly sensitive to light and resistant to dark current and noise.
The four-transistor pixel structure of the typical CMOS image sensor is illustrated in FIG. 1. A unit pixel is comprised of a photo diode (PD), which is a light sensor, and four NMOS transistors. Specifically, a transfer transistor Tx serves to transfer photo-charges generated in the photo diode PD to a diffusion node region FD, a reset transistor Rx serves to discharge charges stored in the diffusion node region FD or the photo diode PD in order to detect signals, a driving transistor Dx serves as a source follower transistor, and a switch transistor Sx is required for switching/addressing operations.
The photo diode PD and a capacitor 118, which are located parallel thereto, constitute a receiving unit, and the transfer transistor Tx transfers electrons generated by photons to a diffusion node 131. In order to obtain a two-dimensional image, an electric potential is applied through a gate 141 of the switch transistor Sx to select one column. In particular, each pixel is biased by a current source 150, which operates the driving transistor Dx and the switch transistor Sx to read an electric potential at the diffusion node 131 through an output node 142.
It has been five years since the development of the above-described CMOS image sensor has progressed in earnest. At present, the CMOS image sensor is being laboriously developed by Micron, Samsung Electronics, MagnaChip, and so on. However, the CMOS image sensor is being fabricated using CMOS technology in the 180 nm regime, but the fabrication of sub-90 nm nanoscale CMOS image sensors has not been attained yet.
Since the fabrication of CMOS image sensors makes use of silicon (Si) as a light absorbing material, high loss of signal is unavoidable in the short wavelength blue region where light is highly absorbed. Although, the magnitude of an image signal is not greatly degraded even if the CMOS image sensors are fabricated using conventional 130 nm CMOS technology, the magnitude of the image signal is considerably degraded at both low and high exposure when the CMOS image sensors are fabricated for sub-90 nm design rules, so that it is difficult to obtain high-quality products.
In other words, when CMOS image sensors are fabricated by means of conventional CMOS technology, the shrinkage of the receiving unit results in a rise in doping concentration, and the junction capacitance of a signal transmission layer (floating-N) increases, so that the magnitude of an image signal becomes insufficient at low exposure. Furthermore, as nanoscale CMOS technology leads to a drop in operating voltage, a sufficient saturation voltage cannot be obtained, and thus the CMOS image sensors cannot keep high image quality at high (saturated) exposure.